136 search results - page 8 / 28 » A Graph Reduction Approach to Symbolic Circuit Analysis |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
DATE
1998
IEEE
13 years 11 months ago
1998
IEEE
Petri nets are a graph-based formalism appropriate to model concurrentsystems such as asynchronouscircuits or network protocols. Symbolic techniques based on Binary Decision Diagr...
CAV
2008
Springer
13 years 9 months ago
2008
Springer
This paper addresses the analysis of concurrent programs with shared memory. Such an analysis is undecidable in the presence of multiple procedures. One approach used in recent wor...
DMCS
2003
13 years 9 months ago
2003
d Abstract) Anah´ı Gajardo† GI2MA, Departamento de Ingenier´ıa Matem´atica, Universidad de Concepci´on, Casilla 160-C, correo 3, Concepci´on, Chile The Langton’s ant is ...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper, a wavelet based approach is proposed for the model order reduction of linear circuits in time domain. Compared with Chebyshev reduction method, the wavelet reductio...