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CODES
2003
IEEE
14 years 20 days ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
SIGCOMM
1995
ACM
13 years 11 months ago
Performance Analysis of MD5
MD5 is an authentication algorithm proposed as the required implementation of the authentication option in IPv6. This paper presents an analysis of the speed at which MD5 can be i...
Joseph D. Touch
DCC
2006
IEEE
14 years 7 months ago
Data Compression with Restricted Parsings
We consider a class of algorithms related to Lempel-Ziv that incorporate restrictions on the manner in which the data can be parsed with the goal of introducing new tradeoffs betwe...
John T. Robinson, Luis Alfonso Lastras-Monta&ntild...
INFOCOM
2007
IEEE
14 years 1 months ago
Iterative Scheduling Algorithms
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
Mohsen Bayati, Balaji Prabhakar, Devavrat Shah, Ma...
ICAT
2007
IEEE
14 years 1 months ago
Compensated Visual Hull for Defective Segmentation and Occlusion
We propose an advanced visual hull technique to compensate for outliers using reliabilities of the silhouettes. The proposed method consists of a foreground extraction technique b...
Hansung Kim, Ryuuki Sakamoto, Itaru Kitahara, Neal...