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» A Hardware Implementation of Layer 2 MPLS
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DSD
2010
IEEE
190views Hardware» more  DSD 2010»
13 years 7 months ago
Hardware-Based Speed Up of Face Recognition Towards Real-Time Performance
— Real-time face recognition by computer systems is required in many commercial and security applications because it is the only way to protect privacy and security in the sea of...
I. Sajid, Sotirios G. Ziavras, M. M. Ahmed
ISCAS
2002
IEEE
82views Hardware» more  ISCAS 2002»
14 years 14 days ago
Area-efficient digital baseband module for Bluetooth wireless communications
1 This paper describes a small and portable digital baseband module developed for Bluetooth wireless technology. To achieve portability and the small size, much of the Bluetooth ba...
Myoung-Cheol Shin, Seong-Il Park, Sung-Won Lee, Se...
SIGCOMM
2009
ACM
14 years 2 months ago
VL2: a scalable and flexible data center network
To be agile and cost effective, data centers should allow dynamic resource allocation across large server pools. In particular, the data center network should enable any server to...
Albert G. Greenberg, James R. Hamilton, Navendu Ja...
SIGCOMM
2009
ACM
14 years 2 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
IWSOC
2005
IEEE
151views Hardware» more  IWSOC 2005»
14 years 1 months ago
A Low Area and Low Power Programmable Baseband Processor Architecture
A fully programmable radio baseband processor architecture is presented. The architecture is based on a DSP processor core and a number flexible accelerators, connected via a con...
Eric Tell, Anders Nilsson, Dake Liu