Many network-management problems in large backbone networks need the answer to a seemingly simple question: where does a given IP packet, entering the network at a particular plac...
Yaping Zhu, Jennifer Rexford, Subhabrata Sen, Aman...
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
Body Sensor Networks (BSNs) consist of sensor nodes deployed on the human body for health monitoring. Each sensor node is implemented by interfacing a physiological sensor with a ...
Sidharth Nabar, Ayan Banerjee, Sandeep K. S. Gupta...
Background: Complex biological database systems have become key computational tools used daily by scientists and researchers. Many of these systems must be capable of executing on...
Marko Srdanovic, Ulf Schenk, Michael Schwieger, Fa...
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...