1998 search results - page 26 / 400 » A Hardware Implementation of PRAM and Its Performance Evalua... |
ISQED
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
FSE
2004
Springer
14 years 22 days ago
2004
Springer
Abstract. We present a fast involutional block cipher optimized for reconfigurable hardware implementations. ICEBERG uses 64-bit text blocks and 128-bit keys. All components are in...
PREMI
2005
Springer
14 years 2 months ago
2005
Springer
In this paper we present and analyze an artificial neural network hardware engine, its architecture and implementation. The engine was designed to solve performance problems of the...
HPCC
2010
Springer
2010
Springer
Implementation and Evaluation of a NAT-Gateway for the General Internet Signaling Transport Protocol
13 years 7 months ago
The IETF's Next Steps in Signaling (NSIS) framework provides an up-to-date signaling protocol suite that can be used to dynamically install, maintain, and manipulate state in ...
IPPS
2009
IEEE
14 years 3 months ago
2009
IEEE
Parallel NFS (pNFS) is an emergent open standard for parallelizing data transfer over a variety of I/O protocols. Prototypes of pNFS are actively being developed by industry and a...