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» A Hardware Relaxation Paradigm for Solving NP-Hard Problems
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CDES
2008
123views Hardware» more  CDES 2008»
13 years 9 months ago
R-tree: A Hardware Implementation
R-tree data structures are widely used in spatial databases to store, manage and manipulate spatial information. As the data volume of such databases is typically very large, the q...
Xiang Xiao, Tuo Shi, Pranav Vaidya, Jaehwan John L...
DATE
2004
IEEE
123views Hardware» more  DATE 2004»
13 years 11 months ago
On Concurrent Error Detection with Bounded Latency in FSMs
We discuss the problem of concurrent error detection (CED) with bounded latency in finite state machines (FSMs). The objective of this approach is to reduce the overhead of CED, a...
Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
ISPD
1997
ACM
186views Hardware» more  ISPD 1997»
13 years 11 months ago
EWA: exact wiring-sizing algorithm
The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...
Rony Kay, Gennady Bucheuv, Lawrence T. Pileggi
DATE
2007
IEEE
167views Hardware» more  DATE 2007»
14 years 2 months ago
A decomposition-based constraint optimization approach for statically scheduling task graphs with communication delays to multip
We present a decomposition strategy to speed up constraint optimization for a representative multiprocessor scheduling problem. In the manner of Benders decomposition, our techniq...
Nadathur Satish, Kaushik Ravindran, Kurt Keutzer
ASPDAC
2005
ACM
114views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Redundant-via enhanced maze routing for yield improvement
- Redundant via insertion is a good solution to reduce the yield loss by via failure. However, the existing methods are all post-layout optimizations that insert redundant via afte...
Gang Xu, Li-Da Huang, David Z. Pan, Martin D. F. W...