129 search results - page 12 / 26 » A Heuristic Approach for Optimization of Path Expressions |
ISPD
2012
ACM
12 years 4 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
GECCO
2003
Springer
14 years 2 months ago
2003
Springer
The aim of the paper is to investigate methods for deriving a suitable set of test paths for a software system. The design and the possible uses of the software system are modelled...
SASP
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arit...
AUTOMATICA
2010
13 years 9 months ago
2010
This paper addresses planning of continuous paths for mobile sensors to reduce uncertainty in some quantities of interest in the future. The mutual information between the measure...
FMCAD
2008
Springer
13 years 10 months ago
2008
Springer
Abstract-- This work presents a technology-independent synthesis optimization that is effective in reducing the total number of state elements of a design. It works by identifying ...