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» A Heuristic for Channel Routing
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FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
14 years 11 days ago
Detailed routing architectures for embedded programmable logic IP cores
As the complexity of integrated circuits increases, the ability to make post-fabrication changes to fixed ASIC chips will become more and more attractive. This ability can be real...
Peter Hallschmid, Steven J. E. Wilton
GLOBECOM
2010
IEEE
13 years 5 months ago
Distributed Scheduling and Routing in Underwater Wireless Networks
Abstract--Several underwater network characteristics, including long propagation delays and a bandwidth dependent on distance, provide unique challenges to protocol designers. In t...
Kurtis B. Kredo II, Prasant Mohapatra
AINA
2005
IEEE
14 years 1 months ago
Optimal Energy-Efficient Routing for Wireless Sensor Networks
The network lifetime for wireless sensor network plays an important role to survivability. Thus, we indicate the importance of routing protocol to network lifetime, and model the ...
Chih-Wei Shiou, Frank Yeong-Sung Lin, Hsu-Chen Che...
INFOCOM
2003
IEEE
14 years 1 months ago
Power Controlled Dual Channel (PCDC) Medium Access Protocol for Wireless Ad Hoc Networks
—In this paper, we propose a comprehensive solution for power control in mobile ad hoc networks (MANETs). Our solution emphasizes the interplay between the MAC and network layers...
Alaa Muqattash, Marwan Krunz
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
14 years 2 months ago
Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints
In this paper, we propose a preprocessing method to improve Side Channel Attacks (SCAs) on Dual-rail with Precharge Logic (DPL) countermeasure family. The strength of our method i...
Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger,...