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» A High Performance Communication Subsystem for PODOS
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DAC
2001
ACM
14 years 8 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
EI
2011
100views more  EI 2011»
12 years 6 months ago
A time-triggered object tracking subsystem for advanced driver assistance systems
— Multi-sensor object tracking is an important feature for advanced driver assistance systems in future automobiles. Most state-of-the-art systems cannot guarantee deterministic ...
Wilfried Elmenreich, M. Koplin
IPPS
2003
IEEE
14 years 9 days ago
An Evaluation of Current High-Performance Networks
High-end supercomputers are increasingly built out of commodity components, and lack tight integration between the processor and network. This often results in inefficiencies in ...
Christian Bell, Dan Bonachea, Yannick Cote, Jason ...
IPPS
1998
IEEE
13 years 11 months ago
Performance and Experience with LAPI - a New High-Performance Communication Library for the IBM RS/6000 SP
LAPI is a low-level, high-performance communication interface available on the IBM RS/6000 SP system. It provides an activemessage-like interface along with remote memory copy and...
Gautam Shah, Jarek Nieplocha, Jamshed H. Mirza, Ch...
LCN
1998
IEEE
13 years 11 months ago
High Performance Integrated Network Communications Architecture (INCA)
Current communication subsystem mechanisms within workstation and PC class computers are limiting network communications throughput to a small percentage of the present network da...
Klaus Schug, Anura P. Jayasumana, Prasanth Gopalak...