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» A High Performance Kernel-Less Operating System Architecture
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DAC
1997
ACM
14 years 7 days ago
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
James Kao, Anantha Chandrakasan, Dimitri Antoniadi...
ARCS
2009
Springer
14 years 2 months ago
Empirical Performance Models for Java Workloads
Abstract. Java is widely deployed on a variety of processor architectures. Consequently, an understanding of microarchitecture level Java performance is critical to optimize curren...
Pradeep Rao, Kazuaki Murakami
SIGOPS
2010
112views more  SIGOPS 2010»
13 years 6 months ago
QoS-oriented control of server systems
Multi-tier architectures are widely used by internet applications. Guaranteeing the performance, and more generally the quality of service (QoS), of such applications remains a cr...
Luc Malrait
CCR
2008
91views more  CCR 2008»
13 years 8 months ago
UFO: a resilient layered routing architecture
Conventional wisdom has held that routing protocols cannot achieve both scalability and high availability. Despite scaling relatively well, today's Internet routing system do...
Yaping Zhu, Andy C. Bavier, Nick Feamster, Sampath...
TVLSI
2002
100views more  TVLSI 2002»
13 years 7 months ago
Architectural strategies for low-power VLSI turbo decoders
Abstract--The use of "turbo codes" has been proposed for several applications, including the development of wireless systems, where highly reliable transmission is requir...
Guido Masera, M. Mazza, Gianluca Piccinini, F. Vig...