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IEEEPACT
2005
IEEE
14 years 1 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
TVLSI
1998
122views more  TVLSI 1998»
13 years 7 months ago
Algorithm-based low-power transform coding architectures: the multirate approach
—In most low-power VLSI designs, the supply voltage is usually reduced to lower the total power consumption. However, the device speed will be degraded as the supply voltage goes...
An-Yeu Wu, K. J. Ray Liu
COMPSAC
2007
IEEE
14 years 2 months ago
An Approach to Adaptive Distributed Execution Monitoring for Workflows in Service-based Systems
Systems based on Service-Oriented Architecture are called service-based systems (SBS), and comprise of computing services offered by various organizations. Users of SBS often requ...
Stephen S. Yau, Dazhi Huang, Luping Zhu
SIGCOMM
2010
ACM
13 years 8 months ago
The OKL4 microvisor: convergence point of microkernels and hypervisors
We argue that recent hypervisor-vs-microkernel discussions completely miss the point. Fundamentally, the two classes of systems h in common, and provide similar abstractions. We a...
Gernot Heiser, Ben Leslie
COMPSAC
2006
IEEE
14 years 2 months ago
Performance Analysis of an Asynchronous Web Server
Modern Web servers need to process multiple requests concurrently in order to fulfill the workload demands expected of them. Concurrency can be implemented in a Web server using ...
U. Praphamontripong, Swapna S. Gokhale, Aniruddha ...