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» A High Performance Kernel-Less Operating System Architecture
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ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 2 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
EMSOFT
2008
Springer
13 years 9 months ago
A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems
NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is...
Jin Kyu Kim, Hyung Gyu Lee, Shinho Choi, Kyoung Il...
GRID
2007
Springer
14 years 1 months ago
CIC portal: a collaborative and scalable integration platform for high availability grid operations
— EGEE, along with its sister project LCG, manages the world’s largest Grid production infrastructure which is spreading nowadays over 260 sites in more than 40 countries. Just...
Osman Aidel, Alessandro Cavalli, Hélè...
CONPAR
1994
13 years 11 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
13 years 12 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...