Sciweavers

3104 search results - page 551 / 621
» A High Performance Kernel-Less Operating System Architecture
Sort
View
123
Voted
ICRA
2005
IEEE
168views Robotics» more  ICRA 2005»
15 years 8 months ago
Control of Scalable Wet SMA Actuator Arrays
- This paper presents a new control method to drive an array of wet Shape Memory Alloy actuators utilizing a Matrix Manifold and Valve system (MMV). The MMV architecture allows a v...
L. Flemming, Stephen A. Mascaro
123
Voted
ESORICS
2009
Springer
16 years 3 months ago
Enabling Public Verifiability and Data Dynamics for Storage Security in Cloud Computing
Cloud Computing has been envisioned as the next-generation architecture of IT Enterprise. It moves the application software and databases to the centralized large data centers, whe...
Qian Wang, Cong Wang, Jin Li, Kui Ren, Wenjing Lou
131
Voted
ICCCN
1997
IEEE
15 years 6 months ago
Design and implementation of a QoS capable switch-router
Rapid expansion has strained the capabilities of the Internet infrastructure. Emerging audio and video applications place further demands on already overloaded network elements, e...
Erol Basturk, Alexander Birman, G. Delp, Roch Gu&e...
VLSID
2007
IEEE
130views VLSI» more  VLSID 2007»
16 years 2 months ago
Impact of NBTI on FPGAs
Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS...
Krishnan Ramakrishnan, S. Suresh, Narayanan Vijayk...
109
Voted
HPCA
2008
IEEE
16 years 2 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...