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DAC
1989
ACM
13 years 12 months ago
Scheduling and Binding Algorithms for High-Level Synthesis
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
Pierre G. Paulin, John P. Knight
ICSM
2003
IEEE
14 years 1 months ago
Software Architecture Recovery based on Pattern Matching
This paper is a summary of the author’s thesis that presents a model and an environment for recovering the high level design of legacy software systems based on user defined ar...
Kamran Sartipi
ITC
2003
IEEE
156views Hardware» more  ITC 2003»
14 years 1 months ago
A High Precision IDDQ Measurement System With Improved Dynamic Load Regulation
This paper describes a system for performing high precision IDDQ measurement of CMOS ICs having a large peak current during operation. Although the measurement rate is at a low sp...
Nobuhiro Sato, Yoshihiro Hashimoto
PPOPP
2005
ACM
14 years 1 months ago
Fault tolerant high performance computing by a coding approach
As the number of processors in today’s high performance computers continues to grow, the mean-time-to-failure of these computers are becoming significantly shorter than the exe...
Zizhong Chen, Graham E. Fagg, Edgar Gabriel, Julie...
ICPP
2009
IEEE
13 years 5 months ago
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
Mondrian Nüssle, Martin Scherer, Ulrich Br&uu...