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» A High Performance Kernel-Less Operating System Architecture
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ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
13 years 9 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson
PAAPP
2006
141views more  PAAPP 2006»
13 years 7 months ago
Algorithmic optimizations of a conjugate gradient solver on shared memory architectures
OpenMP is an architecture-independent language for programming in the shared memory model. OpenMP is designed to be simple and in terms of programming abstractions. Unfortunately,...
Henrik Löf, Jarmo Rantakokko
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
14 years 24 days ago
Tarantula: A Vector Extension to the Alpha Architecture
Tarantula is an aggressive floating point machine targeted at technical, scientific and bioinformatics workloads, originally planned as a follow-on candidate to the EV8 processo...
Roger Espasa, Federico Ardanaz, Julio Gago, Roger ...
AICCSA
2005
IEEE
86views Hardware» more  AICCSA 2005»
14 years 1 months ago
Preemptive rate-based operator scheduling in a data stream management system
Data Stream Management Systems are being developed to process continuous queries over multiple data streams. These continuous queries are typically used for monitoring purposes wh...
Mohamed A. Sharaf, Panos K. Chrysanthis, Alexandro...
ICDCS
2002
IEEE
14 years 25 days ago
ControlWare: A Middleware Architecture for Feedback Control of Software Performance
Attainment of software performance assurances in open, largely unpredictable environments has recently become an important focus for real-time research. Unlike closed embedded sys...
Ronghua Zhang, Chenyang Lu, Tarek F. Abdelzaher, J...