Sciweavers

886 search results - page 49 / 178
» A High Performance Simulator System for a Multiprocessor Sys...
Sort
View
PARLE
1994
14 years 7 days ago
Using Reference Counters in Update-Based Coherent Memory
Abstract. As the disparity between processor and memory speed continues to widen, the exploitation of locality of reference in shared-memory multiprocessors becomes an increasingly...
Evangelos P. Markatos, Catherine E. Chronaki
DSRT
2003
IEEE
14 years 1 months ago
An Agent Architecture for Network Support of Distributed Simulation Systems
Continued research into distributed agent-based systems and evolving web based technologies are opening up tremendous possibilities for the deployment of large scale and highly ex...
Robert Simon, Woan Sun Chang, J. Mark Pullen
SC
1995
ACM
13 years 11 months ago
Lazy Release Consistency for Hardware-Coherent Multiprocessors
Release consistency is a widely accepted memory model for distributed shared memory systems. Eager release consistency represents the state of the art in release consistent protoc...
Leonidas I. Kontothanassis, Michael L. Scott, Rica...
DSD
2003
IEEE
121views Hardware» more  DSD 2003»
14 years 1 months ago
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors
With shrinking feature size of silicon fabrication technology, architects are putting more and more logic into a single die. While one might opt to use these transistors for build...
Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemi...
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
14 years 2 months ago
Energy efficient multiprocessor task scheduling under input-dependent variation
— In this paper, we propose a novel, energy aware scheduling algorithm for applications running on DVS-enabled multiprocessor systems, which exploits variation in execution times...
Jason Cong, Karthik Gururaj