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EUROPAR
1997
Springer
13 years 11 months ago
Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
Edward D. Moreno, Sergio Takeo Kofuji, Marcelo H. ...
PDP
2002
IEEE
13 years 12 months ago
A Fault-Tolerant Reservation-Based Strategy for Scheduling Aperiodic Tasks in Multiprocessor Systems
Periodic and aperiodic tasks co-exist in many realtime systems. The periodic tasks typically arise from sensor data or control loops, while the aperiodic tasks generally arise fro...
Chun-Hua Yang, Geert Deconinck
CCGRID
2002
IEEE
13 years 12 months ago
User-Centric Performance Analysis of Market-Based Cluster Batch Schedulers
This paper presents a performance analysis of marketbased batch schedulers for clusters of workstations. In contrast to previous work, we use user-centric performance metrics as t...
Brent N. Chun, David E. Culler
ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
13 years 11 months ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
ISSS
2002
IEEE
133views Hardware» more  ISSS 2002»
13 years 12 months ago
Efficient Simulation of Synthesis-Oriented System Level Designs
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
Rajesh K. Gupta, Sandeep K. Shukla, Nick Savoiu