Sciweavers

122 search results - page 5 / 25
» A High-Performance Hardware Architecture for Spectral Hash A...
Sort
View
EUROPAR
2009
Springer
14 years 2 months ago
High Performance Matrix Multiplication on Many Cores
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zha...
ITCC
2005
IEEE
14 years 1 months ago
A Scalable and High Performance Elliptic Curve Processor with Resistance to Timing Attacks
This paper presents a high performance and scalable elliptic curve processor which is designed to be resistant against timing attacks. The point multiplication algorithm (double-a...
Alireza Hodjat, David Hwang, Ingrid Verbauwhede
CHES
2008
Springer
134views Cryptology» more  CHES 2008»
13 years 9 months ago
Ultra High Performance ECC over NIST Primes on Commercial FPGAs
Elliptic Curve Cryptosystems (ECC) have gained increasing acceptance in practice due to their significantly smaller bit size of the operands compared to other public-key cryptosyst...
Tim Güneysu, Christof Paar
BIOADIT
2006
Springer
13 years 11 months ago
Packet Classification with Evolvable Hardware Hash Functions - An Intrinsic Approach
Bandwidth demands of communication networks are rising permanently. Thus, the requirements to modern routers regarding packet classification are rising accordingly. Conventional al...
Harald Widiger, Ralf Salomon, Dirk Timmermann
DATE
2007
IEEE
112views Hardware» more  DATE 2007»
14 years 1 months ago
Compact hardware design of Whirlpool hashing core
Weaknesses have recently been found in the widely used cryptographic hash functions SHA-1 and MD5. A potential alternative for these algorithms is the Whirlpool hash function, whi...
Timo Alho, Panu Hämäläinen, Marko H...