Compact hardware design of Whirlpool hashing core

Weaknesses have recently been found in the widely used cryptographic hash functions SHA-1 and MD5. A potential alternative for these algorithms is the Whirlpool hash function, which has been standardized by ISO/IEC and evaluated in the European research project NESSIE. In this paper we present a Whirlpool hashing hardware core suited for devices in which low cost is desired. The core constitutes of a novel 8-bit architecture that allows compact realizations of the algorithm. In the Xilinx Virtex-II Pro XC2VP40 FPGA, our implementation consumes 376

• Type: Conference
• Year: 2007
• Where: DATE
• Authors: Timo Alho, Panu Hämäläinen, Marko Hännikäinen, Timo D. Hämäläinen
• Keywords: Cryptographic Hash Functions, DATE 2007, Hardware, Hash Function, Whirlpool Hash Function