110 search results - page 8 / 22 » A Highly-Configurable Cache Architecture for Embedded System... |
CASES
2001
ACM
14 years 9 days ago
2001
ACM
Energy consumption is a crucial factor in designing batteryoperated embedded and mobile systems. The memory system is a major contributor to the system energy in such environments...
ICS
2005
Tsinghua U.
14 years 2 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
DAC
2010
ACM
13 years 8 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...