165 search results - page 7 / 33 » A Honeycomb Development Architecture for Robust Fault-Tolera... |
FPGA
2003
ACM
14 years 18 days ago
2003
ACM
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
DSD
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
DAC
2012
ACM
11 years 9 months ago
2012
ACM
Many state-of-the-art approaches on fault-tolerant system design make the simplifying assumption that all faults are detected within a certain time interval. However, based on a d...
EH
2005
IEEE
14 years 1 months ago
2005
IEEE
Manufacturing processes are a key source of faults in complex hardware systems. Minimizing this impact of manufacturing uncertainties is one way towards achieving fault tolerant s...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...