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ASAP
2007
IEEE
118views Hardware» more  ASAP 2007»
13 years 9 months ago
Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
Götz Kappen, S. el Bahri, O. Priebe, Tobias G...
INFORMATICALT
2007
95views more  INFORMATICALT 2007»
13 years 7 months ago
Neuro-IG: A Hybrid System for Selection and Elimination of Predictor Variables and non Relevant Individuals
In this article we present the general architecture of a hybrid neuro-symbolic system for the selection and stepwise elimination of predictor variables and non-relevant individuals...
Baghdad Atmani, Bouziane Beldjilali
HCW
2000
IEEE
13 years 12 months ago
Heterogeneity as Key Feature of High Performance Computing: the PQE1 Prototype
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
Paolo Palazzari, Lidia Arcipiani, Massimo Celino, ...
HIPC
2009
Springer
13 years 5 months ago
Integrating and optimizing transactional memory in a data mining middleware
As the size of available datasets in various domains is growing rapidly, there is an increasing need for scaling data mining implementations. Coupled with the current trends in co...
Vignesh T. Ravi, Gagan Agrawal
APSEC
2010
IEEE
12 years 11 months ago
Evaluating Cloud Platform Architecture with the CARE Framework
There is an emergence of cloud application platforms such as Microsoft’s Azure, Google’s App Engine and Amazon’s EC2/SimpleDB/S3. Startups and Enterprise alike, lured by the...
Liang Zhao, Anna Liu, Jacky Keung