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CODES
2007
IEEE
14 years 4 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
ICSEA
2007
IEEE
14 years 4 months ago
Test Data Generation from UML State Machine Diagrams using GAs
Automatic test data generation helps testers to validate software against user requirements more easily. Test data can be generated from many sources; for example, experience of t...
Chartchai Doungsa-ard, Keshav P. Dahal, M. Alamgir...
IEEEPACT
2007
IEEE
14 years 4 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
MICRO
2007
IEEE
79views Hardware» more  MICRO 2007»
14 years 4 months ago
Time Interpolation: So Many Metrics, So Few Registers
The performance of computer systems varies over the course of their execution. A system may perform well during some parts of its execution and poorly during others. To understand...
Todd Mytkowicz, Peter F. Sweeney, Matthias Hauswir...
ICCBR
2007
Springer
14 years 4 months ago
Knowledge Extraction and Summarization for an Application of Textual Case-Based Interpretation
Abstract. This paper presents KES (Knowledge Extraction and Summarization), a new knowledge-enhanced approach that builds a case memory out of episodic textual narratives. These na...
Eni Mustafaraj, Martin Hoof, Bernd Freisleben
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