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ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 4 months ago
Soft error reduction in combinational logic using gate resizing and flipflop selection
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
Rajeev R. Rao, David Blaauw, Dennis Sylvester
ISPD
2007
ACM
151views Hardware» more  ISPD 2007»
13 years 9 months ago
Pattern sensitive placement for manufacturability
When VLSI technology scales toward 45nm, the lithography wavelength stays at 193nm. This large gap results in strong refractive effects in lithography. Consequently, it is a huge...
Shiyan Hu, Jiang Hu
BMCBI
2008
121views more  BMCBI 2008»
13 years 7 months ago
GeneTrailExpress: a web-based pipeline for the statistical evaluation of microarray experiments
Background: High-throughput methods that allow for measuring the expression of thousands of genes or proteins simultaneously have opened new avenues for studying biochemical proce...
Andreas Keller, Christina Backes, Maher Al-Awadhi,...
CVPR
2012
IEEE
11 years 9 months ago
A learning-based framework for depth ordering
Depth ordering is instrumental for understanding the 3D geometry of an image. We as humans are surprisingly good ordering even with abstract 2D line drawings. In this paper we pro...
Zhaoyin Jia, Andrew C. Gallagher, Yao-Jen Chang, T...
BMCBI
2007
162views more  BMCBI 2007»
13 years 7 months ago
Three-Dimensional Phylogeny Explorer: Distinguishing paralogs, lateral transfer, and violation of "molecular clock" assumption w
Background: Construction and interpretation of phylogenetic trees has been a major research topic for understanding the evolution of genes. Increases in sequence data and complexi...
Namshin Kim, Christopher Lee