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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband
POPL
2004
ACM
14 years 7 months ago
Tridirectional typechecking
In prior work we introduced a pure type assignment system that encompasses a rich set of property types, including intersections, unions, and universally and existentially quantif...
Joshua Dunfield, Frank Pfenning
CDES
2008
90views Hardware» more  CDES 2008»
13 years 9 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
HIPC
2004
Springer
14 years 28 days ago
A Parallel State Assignment Algorithm for Finite State Machines
This paper summarizes the design and implementation of a parallel algorithm for state assignment of large Finite State Machines (FSMs). High performance CAD tools are necessary to...
David A. Bader, Kamesh Madduri
ICLP
1998
Springer
13 years 11 months ago
Program Specialisation and Abstract Interpretation Reconciled
Interpretation Reconciled Michael Leuschel1 Department of Computer Science, K.U. Leuven, Belgium DIKU, University of Copenhagen, Denmark fy the relationship between abstract inter...
Michael Leuschel