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» A Logic for Application Level QoS
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ISQED
2009
IEEE
187views Hardware» more  ISQED 2009»
16 years 24 days ago
An efficient current-based logic cell model for crosstalk delay analysis
 Electrical Modeling for High Bandwidth IO Link  Chirayu Amin, Chandramouli Kashyap ¬ Intel Corp., Hillsboro, OR  Prateek Bhansali ¬ Univ. of Minnesota, Mi...
Debasish Das, William Scott, Shahin Nazarian, Hai ...
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
15 years 11 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
UML
2005
Springer
15 years 11 months ago
UML Model Mappings for Platform Independent User Interface Design
While model based design of platform independent application logic has already shown significant success, the design of platform independent user interfaces still needs further in...
Tim Schattkowsky, Marc Lohmann
VTS
2002
IEEE
138views Hardware» more  VTS 2002»
15 years 11 months ago
Test Power Reduction through Minimization of Scan Chain Transitions
Parallel test application helps reduce the otherwise considerable test times in SOCs; yet its applicability is limited by average and peak power considerations. The typical test v...
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailog...
ICWS
2007
IEEE
15 years 7 months ago
Virtualised Trusted Computing Platform for Adaptive Security Enforcement of Web Services Interactions
Security enforcement framework is an important aspect of any distributed system. With new requirements imposed by SOA-based business models, adaptive security enforcement on the a...
Ivan Djordjevic, Srijith K. Nair, Theodosis Dimitr...