1410 search results - page 127 / 282 » A Logic for Virtual Memory |
117
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IBMRD
2006
15 years 4 months ago
2006
Because they are based on large content-addressable memories, load-store queues (LSQ) present implementation challenges in superscalar processors, especially as issue width and nu...
326
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FSKD
2011
Springer
14 years 4 months ago
2011
Springer
—This paper describes a model of a hierarchical, heterogeneous knowledge-base. The proposed model consists of an associative level that is implemented by a Kanerva-like sparse di...
158
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APNOMS
2008
Springer
15 years 6 months ago
2008
Springer
Abstract. Wireless sensor network is a suitable technology for ubiquitous environment. However, in WSN, as the network size grows larger, overheads such as flooding, calculation an...
136
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DSD
2002
IEEE
15 years 9 months ago
2002
IEEE
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
121
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DATE
2009
IEEE
15 years 11 months ago
2009
IEEE
—Flash-based FPGAs are increasingly demanded in safety critical fields, in particular space and avionic ones, due to their non-volatile configuration memory. Although they are al...