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» A Logic for Virtual Memory
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CASES
2010
ACM
15 years 2 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
POPL
1999
ACM
15 years 8 months ago
Typed Memory Management in a Calculus of Capabilities
An increasing number of systems rely on programming language technology to ensure safety and security of low-level code. Unfortunately, these systems typically rely on a complex, ...
Karl Crary, David Walker, J. Gregory Morrisett
CASES
2007
ACM
15 years 8 months ago
Scratch-pad memory allocation without compiler support for java applications
ABSTRACT This paper presents the first scratch-pad memory allocation scheme that requires no compiler support for interpreted-language based applications. A scratch-pad memory (SPM...
Nghi Nguyen, Angel Dominguez, Rajeev Barua
ISCA
2012
IEEE
320views Hardware» more  ISCA 2012»
13 years 6 months ago
Viper: Virtual pipelines for enhanced reliability
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
Andrea Pellegrini, Joseph L. Greathouse, Valeria B...
HPCA
1999
IEEE
15 years 8 months ago
Comparative Evaluation of Fine- and Coarse-Grain Approaches for Software Distributed Shared Memory
Symmetric multiprocessors (SMPs) connected with low-latency networks provide attractive building blocks for software distributed shared memory systems. Two distinct approaches hav...
Sandhya Dwarkadas, Kourosh Gharachorloo, Leonidas ...