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» A Logic of Capabilities
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CCGRID
2005
IEEE
13 years 10 months ago
The Composite Endpoint Protocol (CEP): scalable endpoints for terabit flows
We introduce the Composite Endpoint Protocol (CEP) which efficiently composes a set of transmission elements to support high speed flows which exceed the capabilities of a single...
Eric Weigle, Andrew A. Chien
FCCM
2006
IEEE
125views VLSI» more  FCCM 2006»
14 years 2 months ago
A Multithreaded Soft Processor for SoPC Area Reduction
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
Blair Fort, Davor Capalija, Zvonko G. Vranesic, St...
CADE
2006
Springer
14 years 8 months ago
Extracting Programs from Constructive HOL Proofs Via IZF Set-Theoretic Semantics
Church's Higher Order Logic is a basis for proof assistants -- HOL and PVS. Church's logic has a simple set-theoretic semantics, making it trustworthy and extensible. We ...
Robert L. Constable, Wojciech Moczydlowski
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 2 months ago
MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues
—Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced i...
Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuy...
PRDC
2008
IEEE
14 years 2 months ago
Conjoined Pipeline: Enhancing Hardware Reliability and Performance through Organized Pipeline Redundancy
Reliability has become a serious concern as systems embrace nanometer technologies. In this paper, we propose a novel approach for organizing redundancy that provides high degree ...
Viswanathan Subramanian, Arun K. Somani