: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
We present an efficient search strategy for satisfiability checking on circuits represented at the register-transfer-level (RTL). We use the RTL circuit structure by extending con...
Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting...
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...