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ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
14 years 4 months ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...
RSP
2003
IEEE
176views Control Systems» more  RSP 2003»
14 years 18 days ago
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, A...
CCECE
2006
IEEE
14 years 1 months ago
A Hardware/Software Co-Design for RSVP-TE MPLS
This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...
Raymond Peterkin, Dan Ionescu
DAC
2009
ACM
13 years 11 months ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan
ICIP
1998
IEEE
14 years 9 months ago
Hardware Architecture for Optical Flow Estimation in Real Time
Optical flow estimation from image sequences has been for several years a mathematical process carried out by general purpose processors in no real time. In this work a specific a...
Aitzol Zuloaga, José Luis Martín, Jo...