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» A MIPS R2000 implementation
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CGF
2010
189views more  CGF 2010»
13 years 8 months ago
Real-time Depth of Field Rendering via Dynamic Light Field Generation and Filtering
We present a new algorithm for efficient rendering of high-quality depth-of-field (DoF) effects. We start with a single rasterized view (reference view) of the scene, and sample t...
Xuan Yu, Rui Wang, Jingyi Yu
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
14 years 1 months ago
RENO - A Rename-Based Instruction Optimizer
RENO is a modified MIPS R10000 register renamer that uses map-table “short-circuiting” to implement dynamic versions of several well-known static optimizations: move eliminat...
Vlad Petric, Tingting Sha, Amir Roth
HPDC
1997
IEEE
14 years 4 days ago
Supporting Parallel Applications on Clusters of Workstations: The Intelligent Network Interface Approach
This paper presents a novel networking architecture designed for communication intensive parallel applications running on clusters of workstations (COWs) connected by highspeed ne...
Marcel-Catalin Rosu, Karsten Schwan, Richard Fujim...
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
14 years 1 months ago
A quantitative analysis of the speedup factors of FPGAs over processors
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...
Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vis...
DATE
2003
IEEE
106views Hardware» more  DATE 2003»
14 years 1 months ago
Reconfigurable Signal Processing in Wireless Terminals
In this paper, we show the necessity of reconfigurable hardware for data and signal processing in wireless mobile terminals. We first identify the key processing power requirement...
Jürgen Helmschmidt, Eberhard Schüler, Pr...