383 search results - page 66 / 77 » A Methodology for High Level Power Estimation and Exploratio... |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
— Caches, block memories, predictors, state tables, and other forms of on-chip memory are continuing to consume a greater portion of processor designs with each passing year. Mak...
ISPASS
2010
IEEE
14 years 2 months ago
2010
IEEE
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
BROADNETS
2004
IEEE
13 years 11 months ago
2004
IEEE
Channel-aware scheduling and link adaptation (LA) methods are widely considered to be crucial for realizing high data rates in wireless networks. Multi-carrier systems that spread...
ESANN
2004
13 years 9 months ago
2004
This paper is based on a new way for determining the regularization trade-off in least squares support vector machines (LS-SVMs) via a mechanism of additive regularization which ha...
BMCBI
2007
13 years 7 months ago
2007
Background: The sequencing of many genomes and tiling arrays consisting of millions of DNA segments spanning entire genomes have made high-resolution copy number analysis possible...