Sciweavers

113 search results - page 9 / 23
» A Methodology for Validation of Microprocessors using Equiva...
Sort
View
TCAD
2010
121views more  TCAD 2010»
13 years 2 months ago
Translation Validation of High-Level Synthesis
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
Sudipta Kundu, Sorin Lerner, Rajesh K. Gupta
RSEISP
2007
Springer
14 years 1 months ago
Checking Brain Expertise Using Rough Set Theory
Most information about the external world comes from our visual brain. However, it is not clear how this information is processed. We will analyze brain responses using machine lea...
Andrzej W. Przybyszewski
ISPASS
2006
IEEE
14 years 1 months ago
Automatic testcase synthesis and performance model validation for high performance PowerPC processors
The latest high-performance IBM PowerPC microprocessor, the POWER5 chip, poses challenges for performance model validation. The current stateof-the-art is to use simple hand-coded...
Robert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John,...
WWW
2005
ACM
14 years 8 months ago
Consistency checking of UML model diagrams using the XML semantics approach
A software design is often modeled as a collection of unified Modeling Language (UML) diagrams. There are different aspects of the software system that are covered by many differe...
Yasser Kotb, Takuya Katayama
DATE
2004
IEEE
174views Hardware» more  DATE 2004»
13 years 11 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt