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» A Microeconomic Scheduler for Parallel Computers
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IPPS
2006
IEEE
14 years 2 months ago
Power-performance efficiency of asymmetric multiprocessors for multi-threaded scientific applications
Recently, under a fixed power budget, asymmetric multiprocessors (AMP) have been proposed to improve the performance of multi-threaded applications compared to symmetric multiproc...
Ryan E. Grant, Ahmad Afsahi
HPCA
2005
IEEE
14 years 2 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
HPDC
2002
IEEE
14 years 1 months ago
A Decentralized, Adaptive Replica Location Mechanism
We describe a decentralized, adaptive mechanism for replica location in wide-area distributed systems. Unlike traditional, hierarchical (e.g, DNS) and more recent (e.g., CAN, Chor...
Matei Ripeanu, Ian T. Foster
ICPADS
2002
IEEE
14 years 1 months ago
Evaluating and Improving Performance of Multimedia Applications on Simultaneous Multi-Threading
This paper presents the study and results of running several core multimedia applications on a simultaneous multithreading (SMT) architecture, including some detailed analysis ran...
Yen-Kuang Chen, Eric Debes, Rainer Lienhart, Matth...
CLUSTER
2000
IEEE
14 years 1 months ago
Contention-free Complete Exchange Algorithm on Clusters
To construct a large commodity clustec a hierarchical network is generally adopted for connecting the host muchines, where a Gigabit backbone switch connects a few commodity switc...
Anthony T. C. Tam, Cho-Li Wang