1609 search results - page 295 / 322 » A Microeconomic Scheduler for Parallel Computers |
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
In an out-of-order issue processor, instructions are dynamically reordered and issued to function units in their dataready order rather than their original program order to achiev...
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
FPL
2009
Springer
14 years 7 days ago
2009
Springer
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
GECCO
2008
Springer
13 years 8 months ago
2008
Springer
The Trading Agent Competition in its category Supply Chain Management (TAC SCM) is an international forum where teams construct agents that control a computer assembly company in ...