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GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 13 days ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
DAC
2003
ACM
14 years 22 days ago
4G terminals: how are we going to design them?
Fourth-generation wireless communication systems (4G) will have totally different requirements than what front-end designers have been coping with up to now. Designs must be targe...
Jan Craninckx, Stéphane Donnay
WSC
2001
13 years 8 months ago
Graphical methods for robust design of a semiconductor burn-in process
Discrete-event simulation is a common tool for the analysis of semiconductor manufacturing systems. With the aid of a simulation model, and in conjunction with sensitivity analysi...
Scott L. Rosen, Chad A. Geist, Daniel A. Finke, Jy...
TVLSI
2002
130views more  TVLSI 2002»
13 years 7 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
ASAP
1997
IEEE
156views Hardware» more  ASAP 1997»
13 years 11 months ago
Design methodology for digital signal processing
Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challeng...
Gerhard Fettweis