The speed of optical transmission links is growing at a rate which is difficult for the micro-electronic technology of ATM switches to follow. In order to cover the transmission r...
Tawfik Lazraq, Jakob Brundin, Per Andersson, &Arin...
This paper presents an architecture for a memory model that facilitates versatile reasoning mechanisms over the beliefs stored in an agent’s belief base. Based on an approach fo...
Annerieke Heuvelink, Michel C. A. Klein, Jan Treur
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
Abstract. Linearizability is a commonly accepted notion of correctness for libraries of concurrent algorithms. Unfortunately, it is only appropriate for sequentially consistent mem...
Sebastian Burckhardt, Alexey Gotsman, Madanlal Mus...
The growing complexity of hardware optimizations employed by multiprocessors leads to subtle distinctions among allowed and disallowed behaviors, posing challenges in specifying th...
Sela Mador-Haim, Luc Maranget, Susmit Sarkar, Kayv...