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EIT
2009
IEEE
14 years 3 months ago
System-level memory modeling for bus-based memory architecture exploration
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...
Zhongbo Cao, Ramon Mercado, Diane T. Rover
FPL
2001
Springer
88views Hardware» more  FPL 2001»
14 years 1 months ago
FPGA-Based Discrete Wavelet Transforms System
Although FPGA technology offers the potential of designing high performance systems at low cost, its programming model is prohibitively low level. To allow a novice signal/image pr...
Mokhtar Nibouche, Ahmed Bouridane, Fionn Murtagh, ...
ARCS
2006
Springer
14 years 19 days ago
Estimating Energy Consumption for an MPSoC Architectural Exploration
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
Rabie Ben Atitallah, Smaïl Niar, Alain Greine...
CSREAESA
2004
13 years 10 months ago
An Energy-Aware Synthesis Methodology for OS-Driven Multi-Process Embedded Software
The growing software content in various battery-driven embedded systems has led to significant interest in technologies for energy-efficient embedded software. While lowenergy sof...
Tat Kee Tan, Anand Raghunathan, Niraj K. Jha
WORDS
2005
IEEE
14 years 2 months ago
Virtual Networks in an Integrated Time-Triggered Architecture
Depending on the physical structuring of large distributed safety-critical real-time systems, one can distinguish federated and integrated system architectures. This paper investi...
Roman Obermaisser, Philipp Peti, Hermann Kopetz