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INFOCOM
1995
IEEE
13 years 11 months ago
Measuring the Performance of Parallel Message-Based Process Architectures
Message-based process architectures are widely regarded as an effective method for structuring parallel protocol processing on shared memory multi-processor platforms. A message-b...
Douglas C. Schmidt, Tatsuya Suda
HPDC
1998
IEEE
13 years 11 months ago
High-Speed, Wide Area, Data Intensive Computing: A Ten Year Retrospective
Modern scientific computing involves organizing, moving, visualizing, and analyzing massive amounts of data from around the world, as well as employing largescale computation. The...
William E. Johnston
LCTRTS
2004
Springer
14 years 23 days ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
SPAA
1995
ACM
13 years 11 months ago
Accounting for Memory Bank Contention and Delay in High-Bandwidth Multiprocessors
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...
Guy E. Blelloch, Phillip B. Gibbons, Yossi Matias,...
GLOBECOM
2006
IEEE
14 years 1 months ago
Analog Multi-Tone Signaling for High-Speed Backplane Electrical Links
— Implementing a multi-tone (MT) architecture for high-speed backplane electrical links is difficult given the tight power and complexity constraints in this application. This pa...
Amir Amirkhany, Ali-Azam Abbasfar, Vladimir Stojan...