3629 search results - page 118 / 726 » A Network Memory Architecture Model and Performance Analysis |
3DIC
2009
IEEE
14 years 4 months ago
2009
IEEE
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
ICASSP
2011
IEEE
13 years 26 days ago
2011
IEEE
We investigate classification of non-linguistic vocalisations with a novel audiovisual approach and Long Short-Term Memory (LSTM) Recurrent Neural Networks as highly successful d...
IEEEPACT
2000
IEEE
14 years 1 months ago
2000
IEEE
Region-based compilation repartitions a program into more desirable compilation units for optimization and scheduling, particularly beneficial for ILP architectures. With region-...
IAJIT
2010
13 years 7 months ago
2010
: This paper describes the development of neural network models for noise reduction. The networks used to enhance the performance of modeling captured signals by reducing the effec...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...