3DIC 2009 - PDF Preprint Papers

3DIC 2009 IEEE International Conference on 3D System Integration

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3DIC
2009
IEEE

279views Hardware» more 3DIC 2009»

Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits

14 years 6 months ago

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Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...

Roshan Weerasekera, Matt Grange, Dinesh Pamunuwa, ...

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Id	Views	Title	Status

1	279	Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits	claim
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6	169	3-D memory organization and performance analysis for multi-processor network-on-chip architecture	claim
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11	120	Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh	claim
12	106	Effect of resistance of TSV's on performance of boost converter for low power 3D SSD with NAND flash memories	claim

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