3629 search results - page 130 / 726 » A Network Memory Architecture Model and Performance Analysis |
DSD
2006
IEEE
14 years 26 days ago
2006
IEEE
We present a flexible method for bus and network on chip performance analysis, which is based on the adaptation of workload models to resemble various applications. Our analysis m...
MOBICOM
2003
ACM
14 years 2 months ago
2003
ACM
We develop distributed algorithms for self-organizing sensor networks that respond to directing a target through a region. The sensor network models the danger levels sensed acros...
DSN
2009
IEEE
14 years 3 months ago
2009
IEEE
Virtualization provides the possibility of whole machine migration and thus enables a new form of fault tolerance that is completely transparent to applications and operating syst...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
ICS
1999
Tsinghua U.
14 years 1 months ago
1999
Tsinghua U.
Programming languages that provide multidimensional arrays and a flat linear model of memory must implement a mapping between these two domains to order array elements in memory....