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» A Network Memory Architecture Model and Performance Analysis
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DATE
2008
IEEE
182views Hardware» more  DATE 2008»
14 years 3 months ago
An adaptable FPGA-based System for Regular Expression Matching
In many applications string pattern matching is one of the most intensive tasks in terms of computation time and memory accesses. Network Intrusion Detection Systems and DNA Seque...
Ivano Bonesana, Marco Paolieri, Marco D. Santambro...
INFOCOM
2005
IEEE
14 years 2 months ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas
ICASSP
2008
IEEE
14 years 3 months ago
A realistic performance analysis for practical channel-aware scheduling
It is well-known that opportunistic transmission schemes are sumcapacity optimal, in the Shannon sense, for symmetric cellular networks with single-antenna transceivers. However, ...
Pengcheng Zhan, Ramesh Annavajjala, A. Lee Swindle...
MMS
2007
13 years 8 months ago
Design and analysis of a demand adaptive and locality aware streaming media server cluster
The wide availability of broadband networking technologies such as cable modems and DSL coupled with the growing popularity of the Internet has led to a dramatic increase in the a...
Zihui Ge, Ping Ji, Prashant J. Shenoy
DAC
2003
ACM
14 years 2 months ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich