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» A Network Memory Architecture Model and Performance Analysis
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ISPD
2006
ACM
103views Hardware» more  ISPD 2006»
14 years 1 months ago
High accurate pattern based precondition method for extremely large power/ground grid analysis
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hon...
HPCA
2003
IEEE
14 years 8 months ago
Evaluating the Impact of Communication Architecture on the Performability of Cluster-Based Services
We consider the impact of different communication architectures on the performability (performance + availability) of cluster-based servers. In particular, we use a combination of ...
Kiran Nagaraja, Neeraj Krishnan, Ricardo Bianchini...
ICASSP
2011
IEEE
12 years 11 months ago
Syllabification of conversational speech using Bidirectional Long-Short-Term Memory Neural Networks
Segmentation of speech signals is a crucial task in many types of speech analysis. We present a novel approach at segmentation on a syllable level, using a Bidirectional Long-Shor...
Christian Landsiedel, Jens Edlund, Florian Eyben, ...
ESANN
2008
13 years 9 months ago
Using graph-theoretic measures to predict the performance of associative memory models
We test a selection of associative memory models built with different connection strategies, exploring the relationship between the structural properties of each network and its pa...
Lee Calcraft, Rod Adams, Weiliang Chen, Neil Davey
IEEEPACT
2005
IEEE
14 years 1 months ago
Communication Optimizations for Fine-Grained UPC Applications
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
Wei-Yu Chen, Costin Iancu, Katherine A. Yelick