3629 search results - page 24 / 726 » A Network Memory Architecture Model and Performance Analysis |
FPL
2010
Springer
13 years 5 months ago
2010
Springer
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
It is anticipated that self assembled ultra-dense nanomemories will be more susceptible to manufacturing defects and transient faults than conventional CMOS-based memories, thus t...
ISPASS
2006
IEEE
14 years 1 months ago
2006
IEEE
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
ANCS
2006
ACM
13 years 11 months ago
2006
ACM
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...