3629 search results - page 36 / 726 » A Network Memory Architecture Model and Performance Analysis |
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
HICSS
2002
IEEE
14 years 20 days ago
2002
IEEE
This research focuses on the performance and timing behavior of a two level survivability architecture. The lower level of the architecture involves attack analysis based on kernel...
ESANN
2006
13 years 9 months ago
2006
Abstract. This article underlines the learning and discrimination capabilities of a model of associative memory based on artificial networks of spiking neurons. Inspired from neuro...
JNW
2008
13 years 7 months ago
2008
Next-Generation Wireless Networks (NGWNs) present an all-IP-based architecture integrating existing cellular networks with Wireless Local Area Networks (WLANs), Wireless Metropolit...
TC
2010
13 years 2 months ago
2010
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...