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» A Network Memory Architecture Model and Performance Analysis
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DATE
2009
IEEE
110views Hardware» more  DATE 2009»
14 years 4 months ago
Light NUCA: A proposal for bridging the inter-cache latency gap
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
Darío Suárez Gracia, Teresa Monreal,...
MOBICOM
2004
ACM
14 years 2 months ago
PAVAN: a policy framework for content availabilty in vehicular ad-hoc networks
Advances in wireless communication, storage and processing are realizing next-generation in-vehicle entertainment systems. Even if hundreds of different video or audio titles are...
Shahram Ghandeharizadeh, Shyam Kapadia, Bhaskar Kr...
MSWIM
2005
ACM
14 years 2 months ago
Adapting WLAN MAC parameters to enhance VoIP call capacity
This work describes a detailed simulation-based study of the performance of an IEEE 802.11e Medium Access Control (MAC) layer over an IEEE 802.11g Physical (PHY) layer. The study ...
Gráinne Hanley, Seán Murphy, Liam Mu...
KDD
2003
ACM
269views Data Mining» more  KDD 2003»
14 years 9 months ago
Maximizing the spread of influence through a social network
Models for the processes by which ideas and influence propagate through a social network have been studied in a number of domains, including the diffusion of medical and technolog...
David Kempe, Jon M. Kleinberg, Éva Tardos
ISSS
2002
IEEE
138views Hardware» more  ISSS 2002»
14 years 2 months ago
An Object-Oriented Design Process for System-on-Chip Using UML
The object-oriented design process has been a hot topic in software development since it will improve product quality and productivity significantly, which is also a major issue i...
Tsuneo Nakata, Akio Matsuda, Minoru Shoji, Shinya ...