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» A Network Memory Architecture Model and Performance Analysis
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102
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ARC
2010
Springer
144views Hardware» more  ARC 2010»
15 years 10 months ago
QUAD - A Memory Access Pattern Analyser
In this paper, we present the Quantitative Usage Analysis of Data (QUAD) tool, a sophisticated memory access tracing tool that provides a comprehensive quantitative analysis of mem...
S. Arash Ostadzadeh, Roel Meeuws, Carlo Galuzzi, K...
139
Voted
BDA
2003
15 years 5 months ago
Memory Requirements for Query Execution in Highly Constrained Devices
Pervasive computing introduces data management requirements that must be tackled in a growingvariety of lightweight computing devices. Personal folders on chip, networks of sensor...
Nicolas Anciaux, Luc Bouganim, Philippe Pucheral
121
Voted
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
16 years 16 days ago
Performance Efficiency of Context-Flow System-on-Chip Platform
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
Rami Beidas, Jianwen Zhu
136
Voted
ICPP
1995
IEEE
15 years 7 months ago
The Quest for a Zero Overhead Shared Memory Parallel Machine
– In this paper we present a new approach to benchmark the performance of shared memory systems. This approach focuses on recognizing how far off the performance of a given memor...
Gautam Shah, Aman Singla, Umakishore Ramachandran
115
Voted
ISCA
2005
IEEE
81views Hardware» more  ISCA 2005»
15 years 9 months ago
Energy Optimization of Subthreshold-Voltage Sensor Network Processors
Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performa...
Leyla Nazhandali, Bo Zhai, Javin Olson, Anna Reeve...