3629 search results - page 79 / 726 » A Network Memory Architecture Model and Performance Analysis |
CAISE
2008
Springer
13 years 9 months ago
2008
Springer
A recent trend in Ubiquitous Computing is that embedded software (e.g. in production machines, wired or wireless networked sensors and actuators, or RFID readers) directly offers W...
DAC
2011
ACM
12 years 7 months ago
2011
ACM
The Kahn Process Network (KPN) model is a widely used modelof-computation to specify and map streaming applications onto multiprocessor systems-on-chips. In general, KPNs are difï...
MEMOCODE
2008
IEEE
14 years 2 months ago
2008
IEEE
—Caches are commonly employed to hide the latency gap between memory and the CPU by exploiting locality in memory accesses. The cache performance strongly influences a system’...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...
ASPDAC
2007
ACM
13 years 12 months ago
2007
ACM
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...